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Latest News
November 14, 2023
Baya Systems is pleased to announce that Ameen Ashraf is joining our talented engineering team as Baya Fellow and Lead Verification Architect. Ameen is a widely respected and seasoned industry expert in the area of SoC and IP verification. Ameen brings 24 years of engineering excellence and hands-on SoC verification leadership at numerous top semiconductor teams including at Meta, Apple, Transmeta, and startups. Ameen is a unique verification engineer who brings together a deep hand-on engineering execution ability with a broad knowledge and understanding of the semiconductor systems architecture and design methodology. As the verification lead at Apple silicon, Ameen was responsible for signoff on mass production of several generations of SoC that shipped in millions of iOS devices. He has a stellar track record of shipping more than 30 SoCs with zero critical silicon bugs which speaks volumes of his ability. During his 10+ years tenure at Apple, he became an inspiration for all semiconductor engineers and a critical member of the execution machine. At Meta, he was again the go to engineer for executives to ensure dependable project execution and high-quality SoC delivery. As the chief technical lead on the verification front, he led multiple teams and crafted new methodologies to verify and qualify novel silicon designs involving complex software automation processes. Ameen has been an early star in his career, as an accomplished student from Stanford EE and a holder of double gold medals and the highest GPA in the entire graduating class. Ameen being a verification engineer and joining Baya at the highest technical position is also a testimony of Baya’s focus on delivering the highest quality and zero bug semiconductor products. We are delighted to have Ameen onboard and join our star studded, passionate, and hard working team. Welcome!
November 14, 2023
Baya Systems is pleased to announce that James Aldis is joining our talented engineering team as the Lead Architect. James is a widely respected and seasoned industry expert in the area of SoC architectures, fabrics, and cache coherency. James brings 28 years of engineering excellence and hands-on SoC architecture leadership at numerous semiconductor teams including at Texas Instruments, Intel Corporation, Imagination Technologies, and multiple startups. He was one of the early technical leaders in defining and driving SoC interface and fabric standards such as OCP-IP and AMBA which eventually led to a broader industry appreciation of these standards and recognition of their value in fostering a vibrant ecosystem of IPs and design reuse. He was a Lead Architect at Imagination Technologies where he was responsible for the architecture and execution of several SoCs. Most recently he was a lead architect and Principal Engineer at Intel responsible for the Xeon chiplet architecture. In a career spanning just shy of three decades, James has accomplished much and made fundamental contributions to the advancement of SoC and Fabric architectures. We are delighted to have James onboard and join our star studded, passionate, and hard working team. Welcome!
June 26, 2023
Baya Systems is pleased to announce that Swapnil Lotlikar is joining the talented engineering team at Baya Systems as a Fellow. Swapnil is a widely respected and seasoned industry expert in the area of Cache Coherence, Memory Subsystem and SoC Fabrics. Swapnil brings 18 years of engineering excellence in these fields at the some of the biggest names in the computing world including AMD, Apple, NUVIA Inc, and Qualcomm. He was instrumental in defining and leading the fabric and cache system designs of the primary semiconductor products at these companies. In a career just shy of two decades he has accomplished much and worked with some of the highest impact teams in the computing world. We are delighted to have Swapnil onboard and join our star studded team.
April 27, 2023
Baya Systems is pleased to announce that Jim Keller and Stan Reiss have joined the Board of Directors. Jim Keller is a rockstar of semiconductor industry and has made seminal contributions at AMD, Apple, Tesla and Intel. Stan Reiss is a senior general partner at Matrix Ventures and has been behind multiple blockbuster semiconductor companies.
CAREERS @ BAYA SYSTEMS
We are an early stage tech startup based in Silicon Valley, funded by top tier venture and strategic investors. We are a team of seasoned semiconductor and software professionals with trackrecord of building successful products and companies. We have offices in Santa Clara and Bangalore and we are actively hiring to build an exceptional team of engineers, architects and executives. We offer generous cash and equity based compensation, an exciting and flexible work environment, and the opportunity to mingle and work with some of the biggest names in the semiconductor industry. While we are always on the lookout for star engineers who are eager to work at a premier startup to build high impact industry transforming products, following are some of the specific roles that are currently open.
Hardware Design Engineer
(US) SANTA CLARA CA, AUSTIN TX
HARDWARE ENGINEERING | ON-SITE
We are seeking a seasoned Hardware Design Engineer with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions
Responsibilities
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Design and develop microarchitectures for a set of highly configurable IPs
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Microarchitecture and RTL coding ensuring optimal performance, power, area
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Collaborate with software teams to define configuration requirements, verification collaterals etc.
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Work with verification teams on assertions, test plans, debug, coverage etc.
Qualifications and Preferred Skills
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BS, MS in Electrical Engineering, Computer Engineering or Computer Science
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8+ years and current hands-on experience in microarchitecture and RTL development
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Proficiency in Verilog, System Verilog
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Familiarity with industry-standard EDA tools and methodologies
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Experience with large high-speed, pipelined, stateful designs, and low power designs
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In-depth understanding of on-chip interconnects and NoCs
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Experience with in ARM ACE/CHI or similar coherency protocols
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Experience designing IP blocks for caches, cache coherency, memory subsystems, interconnects and NoCs
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Familiarity with RAS designs, QoS in fabrics, PCIe/IO is a plus
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Experience with modern programming languages like Python is a plus
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Excellent problem-solving skills and attention to detail
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Strong communication and collaboration skills
Performance Architect
(US) SANTA CLARA CA
SOFTWARE ENGINEERING | ON-SITE
We are seeking a seasoned Performance Architect with a strong background in performance modeling as well as architecture and microarchitecture analysis. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions
Responsibilities
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Work closely with architects and micro-architects to find innovative ways to develop performance models for different IP’s
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Develop Baya's system software in Python and C++
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Develop fabric and cache architecture models and data structures
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Develop core software optimization algorithms and platforms
Qualifications and Preferred Skills
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BS, MS in Computer Science, Computer Engineering or Electrical Engineering
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8+ years of hands-on experience with performance modeling and architecture analysis
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Strong object-oriented programming skills with Python and C++
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Experience with performance modeling of IP’s and SoC’s using System C or C++
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Experience with computer architecture, CPU, memory hierarchies and interconnects
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Experience with microarchitecture and debugging RTL waveforms
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Expert level knowledge of Data Structures and Algorithms
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Expert level knowledge of building concurrent system models
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Experience with modern code development practices: Git, CI, UI
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Excellent problem-solving skills and attention to detail
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Strong communication and collaboration skills
Hardware Verification Engineer
(US & INDIA) SANTA CLARA CA, BANGALORE INDIA
HARDWARE ENGINEERING | ON-SITE
We are seeking a seasoned Design Verification designer with a strong background in building testbenches and writing test sequences for complex IPs. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions
Responsibilities
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Create test plans for highly configurable IPs meant to provide interconnectivity between components across an SOC, chiplet or multi chiplet systems
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Write UVM/SystemVerilog code to implement the test plan, checkers and scoreboards
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Collaborate with software teams to define and implement configurable testbenches
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Work with design teams test plans, failure debug, coverage etc.
Qualifications and Preferred Skills
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BS, MS in Electrical Engineering, Computer Engineering or Computer Science
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8+ years and current hands-on experience in block-level/IP-level/SOC-level verification
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Proficiency in Verilog, SystemVerilog
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Familiarity with industry-standard EDA tools for simulation and debug
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Deep experience with UVM-based testbenches
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Experience with modern programming languages like Python
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Knowledge of ARM AMBA protocols such as AXI, APB, and AHB
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Understanding of ARM CHI protocol is a plus
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Experience on working with IPs for caches, cache coherency, memory subsystems, interconnects and NOCs
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Experience with formal verification techniques, emulation platforms is a plus
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Excellent problem-solving skills and attention to detail
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Strong communication and collaboration skills
Software Engineer
(US & INDIA) SANTA CLARA CA, BANGALORE INDIA
SOFTWARE ENGINEERING | ON-SITE
We are seeking a seasoned Software Engineer with a strong background in computer architecture or networking. The ideal candidate will play a key role in shaping our technology portfolio, bringing expertise and creativity to our solutions
Responsibilities
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Develop Baya's system software in Python and C++
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Develop core software optimization algorithms and platforms
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Build performance models of different IP’s
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Work closely with hardware teams to implement configuration knobs for IP's
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Execute verification test plans to produce high quality software
Qualifications and Preferred Skills
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BS, MS in Computer Science, Computer Engineering or Electrical Engineering
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2+ years of hands-on experience in the semiconductor or CAD industry
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Strong object-oriented programming skills with Python and C++
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Expert level knowledge of Data Structures and Algorithms
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Expert level knowledge of building concurrent system models
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Strong understanding of computer architecture, memory hierarchies and networking concepts
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Understanding of software systems design and modelling
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Experience with modern code development practices: Git, CI, UI
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Excellent problem-solving skills and attention to detail
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Strong communication and collaboration skills